[AHDL]
Type=Implementation
Handle=133296
Project=e:\prog\ds_dma_project\ambpex5_v20_sx50t_core\ambpex5_v20_sx50t_core.adf
[Xilinx]
Path=C:\Xilinx\13.1\ISE_DS\ISE\bin\nt
[GUI]
AutoClose=0
[ChipScope]
InserterEnable=1
InserterGuiEnable=1
NetlistMergingEnable=1
InserterProjectPath=e:\prog\ds_dma_project\ambpex5_v20_sx50t_core\synthesis\ambpex5_v20_sx50t_core.cdc
UseInserterBat=0
BinariesFolder=C:\Xilinx\13.1\ISE_DS\ISE\bin\nt
[Design.PartSelector]
Family=VIRTEX5
Device=5vsx50tff1136
Speed=-1
Part=5vsx50tff1136-1
[Design.Input]
Netlist=e:\prog\ds_dma_project\ambpex5_v20_sx50t_core\synthesis\ambpex5_v20_sx50t_core.ngc
UCF=e:\prog\ds_dma_project\ambpex5_v20_sx50t_core\src\top\ambpex5_v20_sx50t_core.ucf
OutputPath=e:\prog\ds_dma_project\ambpex5_v20_sx50t_core\implement
OutputRelativePath=implement
StdOutputFile=e:\prog\ds_dma_project\ambpex5_v20_sx50t_core\log\implementation.htm
Version=ver1
Revision=rev1
Format=None
EffortLevel=2
InputTristateTermMode=Keeper
UnusedIOPadTermMode=Keeper
Mode=batch
SDF_path=e:\prog\ds_dma_project\ambpex5_v20_sx50t_core\implement
Corelate=1
ExeName=ise.exe
ImplToolName=MV_ISE122
SynthToolName=MV_XST122
DirectoryList={e:\prog\ds_dma_project\ambpex5_v20_sx50t_core\synthesis} {e:\prog\ds_dma_project\ambpex5_v20_sx50t_core\compile} {e:\prog\ds_dma_project\ambpex5_v20_sx50t_core\src}
DestinationPath=e:\prog\ds_dma_project\ambpex5_v20_sx50t_core\implement
SynthesisPath=e:\prog\ds_dma_project\ambpex5_v20_sx50t_core\synthesis
ClbPackingStrategy=100
PackClbRegisters=0
UseBufg=0
IgnoreRlocConstr=1
DetailedReport=0
Place_And_Route_Mode=Route Only
dont_run_translate=0
dont_run_map=0
dont_run_place=0
dont_run_trace=0
dont_run_post_map_trace=1
dont_run_simulation=1
dont_run_fit=0
dont_run_bitgen=0
use_ngdbuild_file=0
use_par_file=0
use_map_file=0
use_post_map_file=0
use_trace_file=0
use_netgen_file=0
use_cpld_ndg2vhdl_file=0
use_cgsm_ndg2vhdl_file=0
use_bitgen_file=1
use_use_cpldfit_file=0
use_hprep6_file=0
use_tsim_file=0
bitgen_file_str=e:\prog\ds_dma_project\ambpex5_v20_sx50t_core\implement\ver1\rev1\bitgen.bat
Generate_Asynchronous_Delay_Report=0
Generate_Clock_Region_Report=0
DoCopyGlblFile=0
ToolIniPathName=e:/prog/ds_dma_project/ambpex5_v20_sx50t_core/src/tool.ini
[Engine.Command]
Command=LaunchTool
ToolName=FPGAEditor
[Engine.LaunchTool.Output]
Status=OK
